CSE 420: Computer Architecture (Spring 2011)

Lecture M, W 2:00 P.M. - 3:15 P.M. BYAC 270
Instructor Georgios Varsamopoulos
Office BY514
Email   georgios.varsaamopoulos@asu.edu
Office Hours MTW 3:30 P.M. - 4:30 P.M.
TA TBA
TA Office TBA
TA Office Hour TBA


CONTENTS

ANNOUNCEMENT

  • A student must check the course web page regularly.

COURSE DESCRIPTION

Goal and Topics
Computer architecture. Performance versus cost tradeoffs. Instruction set design. Basic processor implementation and pipelining. Instruction-level parallelism and its exploitation. Multiprocessors and thread-level parallelism. Memory hierarchy design. Storage systems.
Prerequisite: Computer Syst Engr or Computer Science students and must have received a C or greater in CSE 230, CSE 330 or EEE 230 or currently enrolled in CSE 230 or EEE 230. .

Grading
A+
97%-100%
Student shows superior understanding of purpose and significance of the problem; is able to identify related problems; has solved the problem using novel approach and insight.
A
94%-96%
Student shows good understanding of purpose and significance of the problem; is able to identify related problems; has solved the problem displaying some degree of insight.
A-
90%-93%
B+
87%-89%
Student can solve the problem with some sophistication but is unable to judge its importance.
B
84%-86%
B-
80%-83%
C+
76%-79%
Student lacks understanding of how to approach the problem or proposes very naive solutions for the problem.
C
70%-75%
D
60%-69%
Student demonstrtes substandard performance
E
<60%
Student fails to demonstrate any competency

The final letter grade will be assigned based on weighted average of the grades obtained in the following categories:

Assignments: 20%
Quizes & in-class participation: 10%
Project/Term paper: 30%:  5% Progress Report, 10% Presentation, 15% Final Paper
Exams: 40%: Prereq 5%, Midterm1 7%, Midetrm2 8%, Final Exam 20%

Notice:
1) Assignments include written and programming assignments; knowledge of JAVA, C and Assembly Language programming is assumed.
2) Quizzes can be unannounced.
3) Graduate students are expected to demonstrate a deeper understanding of the subject material. At times, graduate students will be assigned more challenging assignments and exam problems.

Notice: the above description is not finalized and subject to change. Student should check back this page on a regular basis.


ASSIGNMENTS


Points Date Assigned Due Date Files
Assignment



#1 4%
Friday, Feb 4
Friday, Feb 11
- PDF
#2 4%



#3 4%



#4 4%



#5 4%



Project




30%



Exam



PreReq. exam
5%



Midterm #1 7%



Midterm #2 8%



Final exam 20%
May 9, 12:10pm--2pm




LECTURE NOTES

Week Class # Date Topics/Events Materials
1 1 01/19 Course Introduction - Slides
2 2 01/24 Instruction Set Architecture - Slides
3 01/26 Instruction Set & Processor
- Slides
3 4 01/31
Pipeline, Hazards, Performance
- Slides
5 02/02 Probability Theory Review
- Slides
4 6 02/07 Cache performance
- Slides
7 02/09 Cache optimization and set associativity

5 8 02/14 Review

9 02/16 Pre-req exam

6 10 02/21 Leveraging ILP
- Dependencies

- Slides
11 02/23 Leveraging ILP
- Loop unrolling
 slides above
7 12 02/28

13 03/02 - Tomasulo's algorithm
- slides
8 14 03/07 Midterm review

15 03/09 Midterm #1

9 Spring Break
10 16 03/21 Midterm solutions

17 03/23 Chapter 3 - Limits of ILP

11 18 03/28 Chapter 3 (cont'd)

19 03/30 Chapter 4 - Thread-level parallelism
- Slides
12 20 04/04 Shared memory snooping
slides above
21 04/06 Directory-based shared memory

13 22 04/11 - Progress reports due
Midterm 2 review

23 04/13 Midterm #2

14 24 04/18 Chapter 5, Cache optimizations

25 04/20 Project presentations

15 26 04/25 Project presentations

27 04/27 Project Presentation

16 28 05/02 final exam review



05/09
FINAL EXAM
12:10pm - 2:00pm


REFERENCE



READING LIST



POLICY ON CHEATING

Any incidence of cheating in this class will be severely dealt with. This applies to homework assignments, programming assignments, quizzes and tests. The minimum penalty for cheating will be that the student will not obtain any credit for that particular assignment. (This means that if in a test and/or assignment a student is found have cheated, he/she will obtain zero in that test and/or assignment.) For the homework and the programming assignments students may discuss the problems with others, but one is expected to turn in the results of one's own effort (not the results of a friend's efforts). One tends to get very suspicious if two identically wrong results show up in the homework assignment and/or tests. The names of the offenders will be maintained in the departmental files. The repeat offenders may be debarred from the University.









Home | Projects | People | Publications | Courses | Resources | Contact