CSE 420/598: Computer Architecture (Spring 2010)

Lecture M, W 2:00 P.M. - 3:15 P.M. BYAC 270
Instructor Sandeep Gupta
Office BY522
Email Sandeep.Gupta@asu.edu
Office Hours MW 3:30 P.M. - 5:00 P.M.
TA Su Jin Kim(Su.Kim@asu.edu)
TA Office BY517AD
TA Office Hour TTH 10:00 A.M. - 11:30 A.M. or by appointment


CONTENTS

ANNOUNCEMENT

  • [04-07-2010] The grades for the midterm have been posted.
  • [03-31-2010] The grades for the third assignment have been posted. Please check the grading sheet sent via email and the posting score. If you have any problems/doubts, contact TA as soon as possible.
  • [03-15-2010] The grades for the second assignment have been posted. TA has already sent grading sheets to students who made on-time submission. Please check your email and the posting score. If you have any problems/doubts, contact TA as soon as possible.
  • [03-10-2010] The third assignment has been posted. The input file will be posted soon. It is due Mar. 24, 2010 before the class.
  • [03-08-2010] The midterm will be on Monday, Mar. 29, 2010.
  • [03-05-2010] The grades for the first assignment have been posted. TA will send an email with a grading sheet to an individual student. Please check your email and the posting score here. If you have any problems/doubts, please contact TA as soon as possible.
  • [03-01-2010] The second assignment has been posted. It is due on Monday, Mar. 08, 2010 before the class (2:00pm). You must send the softcopy of source codes, report, and excel file to su.kim.asu@gmail.com before the deadline and bring the hardcopy of your report and excel file to the class.
  • [03-01-2010] The code review for the first assignment will be after today's class (03/01/2010) and between 10:00-11:30 on Tuesday, 03/02/2010. If you can not make it, send email to TA and set up the time as soon as possible.
  • [02-17-2010] The mailing list has been created for this class. You must receive the email from TA today if you have registered. If not, contact TA as soon as possible. It is very important because all announcement will be sent to this list.
  • [02-17-2010] The first assignment has been posted. Note that this is just a draft. You will receive the email when it is updated. It is due on Wednesday, Mar. 01, 2010 before the class (2:00pm).
  • [02-10-2010] The second exam for prerequisite will be on Monday, Feb. 15, 2010. The exam is closed book and closed note.
  • [02-10-2010] A student must check the current scores regularly. Use the link "Scores" above. If you have any questions, contact TA (su.kim@asu.edu).
  • [01-27-2010] We will have an exam for prerequisite on Monday, Feb. 8, 2010. It will be 30 min. and 5 points.
  • A student must check the course web page regularly.

COURSE DESCRIPTION

Goal and Topics
Computer architecture. Performance versus cost tradeoffs. Instruction set design. Basic processor implementation and pipelining. Instruction-level parallelism and its exploitation. Multiprocessors and thread-level parallelism. Memory hierarchy design. Storage systems.
Prerequisite: Computer Syst Engr or Computer Science students and must have received a C or greater in CSE 230, CSE 330 or EEE 230 or currently enrolled in CSE 230 or EEE 230. .

Grading
The following grading rubric will be used to evaluate all the submitted material and performance tasks:
A+: Student shows superior understanding of purpose and significance of the problem; is able to identify related problems; has solved the problem using novel approach and insight.
A: Student shows good understanding of purpose and significance of the problem; is able to identify related problems; has solved the problem displaying some degree of insight.
B: Student can solve the problem with some sophistication but is unable to judge its importance.
C: Student lacks understanding of how to approach the problem or proposes very naive solutions for the problem.

The final letter grade will be assigned based on weighted average of the grades obtained in the following categories:

Assignments: 30%
Quiz + Class Presentation: 20%
Project/Term paper: 20%
Exam: 30%

Notice:
1) Assignments include written and programming assignments; knowledge of JAVA, C and Assembly Language programming is assumed.
2) Quizzes can be unannounced.
3) Graduate students are expected to demonstrate a deeper understanding of the subject material. At times, graduate students will be assigned more challenging assignments and exam problems.

Notice: the above description is not finalized and subject to change. Student should check back this page on a regular basis.


ASSIGNMENTS

Points Date Assigned Due Date Files
Assignment
#1 Feb. 17, 2010 Mar. 01, 2010 Description, Input file, Test cases
#2 Mar. 01, 2010 Mar. 08, 2010 Description, Excel Template
#3 Mar. 10, 2010 Mar. 24, 2010 Description, Excel Template, Testfiles, Input file, Q&A
#4 Mar. 31, 2010 Apr. 14, 2010 Description, Testfiles, Input file, Excel Template
#5 Apr. 21, 2010 Apr. 26, 2010 Description
Project
Feb. 17, 2010 Mar. 01, 2010 Group List, Guideline, Poster Session
Exam
PreReq. exam #1 pts. 2:00 - 2:30 PM, Monday, Feb. 8, 2010
PreReq. exam #2 pts. 2:00 - 2:30 PM, Monday, Feb. 15, 2010
Midterm #1 pts. 2:00 - 3:15 PM, Monday, Mar. 29, 2010
Midterm #2 pts. 2:00 - 3:15 PM, Monday, Apr. 26, 2010
Final exam pts. 12:10 - 2:00 PM, Monday, May 10, 2010


LECTURE NOTES

Week Class # Date Topics Materials
1 1 01/20 Course Introduction Slides
2 2 01/25 Instruction Set Architecture COD (Computer Organization and Design) Chapter 2
Slides
3 01/27 Instruction Set and Processor Slides (COD-Chap. 2), Slides (COD-Chap. 4)
3 4 02/01 Pipeline, Hazards, and Performance Slides (COD-Chap. 4)
5 02/03 Memory Hierarchy - Cache Introduction Slides (COD-Chap. 5)
4 6 02/08 PreReq. Exam #1
7 02/10 Review and Caching Slides (COD-Chap. 5)
5 8 02/15 PreReq. Exam #2
9 02/17 Cache, Optimization of Cache Performance, Storing order Slides (COD-Chap. 5)
CAQA (Ccmputer Architecture: A Quantitative Approach)-Section 5.2
6 10 02/22 Cache - Set associativity, Virtual Memory Introduction Slides (COD-Chap. 5)
Reading Assignment: COD-Section 5.6
11 02/24 Cache Performance, Virtual Memory - TLB, Operation of a Memory Hierarchy CAQA-Section C.2. Fig. C.7 (pp. C-21)
COD-Section 5.6. Fig. 5.25 (pp. 506), Fig. 5.26 (pp. 507)
Slides (COD-Chap. 5), Notes
7 12 03/01 Discussion on Assignment 2 - Code Optimization for Cache Performance, Code Review for Assignment 1
13 03/03 Memory Hierarch Design Challenges, Multiprocessor Caching - Intro., Snooping Cache Coherence Protocol (MSI) COD-Chap 7., CAQA-Section 4.2. Fig. 4.5, Fig. 4.6
Notes
8 14 03/08 Snooping Cache Coherence Protocol, False sharing, and Directory-based Coherence Protocol Intro. CAQA-Section 4.3 Example (pp. 219), Section 4.4 Fig 4.19 (pp. 232), Fig 4.21 (pp. 235), Fig 4.22 (pp. 236)
Notes
Reading Assignment: CAQA-pp. 234 - 237
15 03/10 Directory-based Coherence Protocol and Example CAQA-Section 4.3 Fig. 4.20 (pp. 233), Fig. 4.21 (pp. 235)
Notes
9 Spring Break
10 16 03/22 False sharing and Directory-based Coherence Protocol Example, Reviews for Assignment 3 and Midterm
17 03/24 Reviews for Midterm
11 18 03/29 Midterm 1
19 03/31 Parallelism Intro, Pipelining Performance- SpeedUp Notes
12 20 04/05 Pipelining - Hazard, Forwarding, Implementation of Pipeline for MIPS CAQA-Section A.1 - A.4
21 04/07 Review for Midterm Questions, Group Project Group Project
13 22 04/12 Pipelining - Forwarding, Data and Control Hazards, Register Renaming, Dynamic Scheduling Intro. Notes
CAQA-Section 2.5
23 04/14 Tomasulo and Speculation Slides
Reading Assignment: CAQA-Section 2.6
14 24 04/19 Tomasulo with Reorder Buffers Slides
25 04/21 Quiz, Power-Aware Computing Paper
15 26 04/26 Midterm 2
27 04/28 Reviews for Assignment 5, Thermal-aware Job Scheduling Slides
16 28 05/03 IPAD: Intro, Memory setup and Programming, Intel ATOM, Introduction to Mobile/Pervasive Computing Slides


REFERENCE



READING LIST



POLICY ON CHEATING

Any incidence of cheating in this class will be severely dealt with. This applies to homework assignments, programming assignments, quizzes and tests. The minimum penalty for cheating will be that the student will not obtain any credit for that particular assignment. (This means that if in a test and/or assignment a student is found have cheated, he/she will obtain zero in that test and/or assignment.) For the homework and the programming assignments students may discuss the problems with others, but one is expected to turn in the results of one's own effort (not the results of a friend's efforts). One tends to get very suspicious if two identically wrong results show up in the homework assignment and/or tests. The names of the offenders will be maintained in the departmental files. The repeat offenders may be debarred from the University.









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